Job Title

Principal Engineer - Standard Cell DesignExperience: 9 to 15+ years. Work Location: Hyderabad Responsibilities o Design and maintain standard cells for new products based on new technology. o Characterize the performance of standard cells and optimize the standard cell design and layout. o Characterization and modeling of Standard Cell and semi-Custom cells to provide timing/power model for verification. o Quality Analysis of characterized liberty models in terms of Timing, Power and Functionality. o Closely collaborate with DTCO team to work on stdcells architecture for emerging technologies. o Develop automation test bench/flow/tools to improve the work efficiency and help data analysis. o Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Requirements o Good understanding of CMOS circuit design o Good knowledge of CMOS device physics and layout o Experience in any characterization tools (Siliconsmart/Liberate) and Cadence Virtuoso preferred. o Experience in Primetime, Solido Analytics, ICC flow is added an advantage. o Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision o Experience in Standard Cell design and verification o Experience in using Skill, TCL, Perl, Python to do test bench automation and data analysis is a plus o Previous work experience in DRAM memory related fields or analog blocks is a plus. o Must possess good interpersonal & communication skills and ability to work well in a teamThanks & RegardsVikas KumarMobile: 7259699404 / Email: vikas@This Job profile is Client of ConnectPro.