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About Krutrim: High-Level Abstract of Krutrim's Next-Generation Silicon Design At Krutrim , we are pushing the boundaries of AI computing by designing a state-of-the-art, next-generation AI accelerator —a purpose-built silicon architecture optimized for AI training and inference at scale. Developing reusable verification IP . Verification plan developments for complex SoC’s and multi-chiplet System on Packages Leading verification efforts on module, sub-systems, chiplets and complex multi-chiplet testbench environments. Join us at Krutrim and build the future of AI computing! Lead Digital Verification Engineer Responsibilities Verification plan developments for complex SoC’s and multi-chiplet System on Packages Leading verification efforts on module, sub-systems, chiplets and complex multi-chiplet testbench environments. Developing UVM and C/Python based testbench environments for functional, netlist and power simulations Developing reusable verification IP. Developing reference models using System Verilog / SystemC / Python Improving verification flow and methodology Debugging design units using simulation and formal tools and methodologies. Collaborating with Architects, Systems and Software engineering on post-silicon debug in the lab Skills and qualifications Bachelor's/Master’s degree in Electronics Engineering and 10+ years of experience in verification of complex SoC designs Excellent code development skills in System Verilog/SVA/UVM Deep knowledge and experience of of metric driven verification methodology and flow Extensive experience with use of various state-of-the-art simulation and formal tools. Experience with verification of CPU/DPU/GPU based sub-systems. Protocol Experience with industry standard protocols such as CXL/PCIe/UCIe/Ethernet Education & Experience - Bachelor's/Master’s degree in Electronics Engineering and 5+ years of experience in verification of complex SoC designs