RTL Design: Design and implement RTL code for ASICs in Verilog or SystemVerilog . Create high-quality, reusable, and maintainable RTL code for complex digital systems. Architecture Design: Work closely with architects to understand the high-level design specifications and translate them into efficient RTL code. Participate in defining micro-architecture for different blocks within the ASIC.
Job Title
ASI RTL Engineer 4 years HYD