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Job Title


Verification Engineer - Senior 


Company : TekWissen ®


Location : Markham, Ontario


Created : 2025-04-21


Job Type : Full Time


Job Description

Job Title: Verification Engineer - Senior Work Location: Markham, ONDuration: 7 Months Work Type: Contract Job Type: Onsite Pay Rate: $55-55/hr on T4Overview:TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.Job Description: THE ROLE: As a member of verification team, you will work with leading industry tools and design & verification concepts to achieve full functional, performance & power verification closure on a variety of digital design blocks which are a part of the Graphics Core IP (GFXIP). You will work closely with architects, designers and other design verification engineers to author test plan for pre-silicon verification, planning & development of testbenches to exercise the design, write detailed test plans to cover new blocks and features, drive the development of test-cases and cover points or assertions to achieve verification closure.THE PERSON: Besides a passion for modern, complex processor architecture, digital design, and verification in general, these personal qualities are essential to success in this role:Excellent analytical and organizational skills; Outstanding verbal & written communicationA self-starter who excels at driving tasks to completion and enabling collaboration amongst team membersKEY RESPONSBILITIES: Work closely with the architect, RTL designers and other verification engineers to achieve verification closure within project schedulesBe responsible for functional, power and performance verification of a block, including verification planning, execution and DV closureDevelop and execute test and coverage plans to ensure the functional, performance and power completenessCreate, reuse and debug testbenches, verification components and tests for verification of the designBe expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.EXPERIENCE AND EDUCATION: Minimum 5+ years of verification experience on large ASIC development projects;Solid understanding of Computer Architecture and Digital Design concepts;Very strong background in Verilog, System Verilog, C/C++/OOO coding techniques;Experience working with UVM, OVM or equivalent;Experience with constrained random verification, functional coverage and assertions;Experience with formal verification is an added advantage;Familiarity with one of the scripting languages: perl/tcl/ruby/Bash/python;Experience working with industry standards tools such Synopsys VCS, VC Formal, DVE, Verdi, GDB or equivalent;Strong analytical skills and attention to detail;Bachelors (or preferably Masters) degree in Computer Engineering, Computer Science, Electrical Engineering or similar tests and planTekWissen Group is an equal opportunity employer supporting workforce diversity.